rpi3: Enable GPIO in BL2
authorYing-Chun Liu (PaulLiu) <[email protected]>
Mon, 21 Jan 2019 19:27:55 +0000 (03:27 +0800)
committerYing-Chun Liu (PaulLiu) <[email protected]>
Fri, 25 Jan 2019 16:13:49 +0000 (00:13 +0800)
This patch inits the GPIO in BL2 earlysetup. So BL2 can start operating
GPIO pins.

Signed-off-by: Ying-Chun Liu (PaulLiu) <[email protected]>
plat/rpi3/platform.mk
plat/rpi3/rpi3_bl2_setup.c
plat/rpi3/rpi3_hw.h

index 5e76345a5e1b5cedb0417fbcd9c0373cf77708e4..ded92bd3db7240ede2095793e060893dd03847c7 100644 (file)
@@ -27,6 +27,10 @@ BL2_SOURCES          +=      common/desc_image_load.c                \
                                drivers/io/io_fip.c                     \
                                drivers/io/io_memmap.c                  \
                                drivers/io/io_storage.c                 \
+                               drivers/gpio/gpio.c                     \
+                               drivers/delay_timer/delay_timer.c       \
+                               drivers/delay_timer/generic_delay_timer.c \
+                               drivers/rpi3/gpio/rpi3_gpio.c           \
                                plat/common/aarch64/platform_mp_stack.S \
                                plat/rpi3/aarch64/plat_helpers.S        \
                                plat/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \
index 53a2c72b8c5cc118c01d1d2cc7a4947e8c5a6acf..09f0562129ab8e610e4a4ffce40c2afdfa206c90 100644 (file)
 #include <lib/optee_utils.h>
 #include <lib/xlat_tables/xlat_mmu_helpers.h>
 #include <lib/xlat_tables/xlat_tables_defs.h>
+#include <drivers/generic_delay_timer.h>
+#include <drivers/rpi3/gpio/rpi3_gpio.h>
 
 #include "rpi3_private.h"
 
 /* Data structure which holds the extents of the trusted SRAM for BL2 */
 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
 
+/* rpi3 GPIO setup function. */
+static void rpi3_gpio_setup(void)
+{
+       struct rpi3_gpio_params params;
+
+       memset(&params, 0, sizeof(struct rpi3_gpio_params));
+       params.reg_base = RPI3_GPIO_BASE;
+
+       rpi3_gpio_init(&params);
+}
+
 /*******************************************************************************
  * BL1 has passed the extents of the trusted SRAM that should be visible to BL2
  * in x0. This memory layout is sitting at the base of the free trusted SRAM.
@@ -35,6 +48,12 @@ void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1,
        /* Initialize the console to provide early debug support */
        rpi3_console_init();
 
+       /* Enable arch timer */
+       generic_delay_timer_init();
+
+       /* Setup GPIO driver */
+       rpi3_gpio_setup();
+
        /* Setup the BL2 memory layout */
        bl2_tzram_layout = *mem_layout;
 
index 9d86eb8809db804046629f5e5c0ef50e359252fc..61d1837726e40b87a3928ce0af1e5f734572c84b 100644 (file)
 #define RPI3_MINI_UART_BASE            (RPI3_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
 #define RPI3_MINI_UART_CLK_IN_HZ       ULL(500000000)
 
+/*
+ * GPIO controller
+ */
+#define RPI3_IO_GPIO_OFFSET            ULL(0x00200000)
+#define RPI3_GPIO_BASE                 (RPI3_IO_BASE + RPI3_IO_GPIO_OFFSET)
+
 /*
  * Local interrupt controller
  */